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To provide architectural support for high performance3D graphics on multicomputers,we have designed and implemented a distributed frame bufferon the Intel Paragon routing network. This design relievesthe conventional I/O bottleneck for frame buffer accessby taking advantages of the processor's internal network --high bandwidth, low latency, and fast routing.And the frame buffer can be used both on the Princeton Shrimp and the Intel Paragon |
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Last Updated : March 22, 1999 |
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